The CPU

A simple CPU

The Arithmetic Logic Unit (ALU).

The thing that knows how to do arithmetic (addition, subtraction, etc.) and logic (and, or, not).

Drawn as a chonky V because most operations it can do take two inputs in the top and spits one result out the bottom.

The big boss of the CPU. Tells the ALU what to do and controls access to memory.

Random Access Memory (RAM).

Not part of the CPU but the CPU is pretty useless without it.

Where data lives when the CPU isn’t operating on it.

Registers

Registers are memory that lives on the CPU. Our simple CPU has just a few special purpose registers.

Connected directly to the ALU. One input to most operations and also where the result is stored.
Program counter. The address of the next instruction in memory.
Instruction register. The data representing the current instruction.
Memory Address Register. The address to be used for loading from and storing to RAM.
The data loaded from or to be stored to RAM.

Flags

One-bit values set by the ALU to carry information about computed results.

Set when the result computed by the ALU is zero.
Set when the result computed by the ALU is negative.
Set when an operation, treating the bits as unsigned numbers, had a carry out.
Set when an operation, treating the bits as signed numbers, overflowed and switched signs when mathematically it shouldn’t have.

Talking to memory

The control unit can move data between RAM and the CPU’s registers via the MAR and MDR and the control bus, a set of wires that it uses to communicate with the rest of the computer including with RAM.

Reading from memory

Control Unit puts an address into the MAR and signals a read on the control bus. The address in MAR is sent on the address bus to RAM and data comes back in on the data bus and is stored in the MDR.

Writing to memory

Control Unit puts an address into the MAR and data into the MDR and signals a write on the control bus. The address bits are then sent on the address bus to RAM and data on the data bus and they are stored into the given address in RAM.

Fetch/Decode/Execute Cycle

  • Fetch the next instruction from memory.
  • Decode the instruction to extract the op code and inputs.
  • Execute the instruction with the appropriate inputs.

All the phases are coordinated by the Control Unit.

Fetch

The control unit talks to memory to tell it to load the value at the address stored in the program counter.

  1. Copy the PC to the MAR.
  2. Read from memory which puts data in the MDR.
  3. Increment the PC with some dedicated circuitry.
  4. Copy the MDR to the IR.

Decode

In the decode phase the control unit takes apart the contents of the IR

A single instruction contains an op code which tells the control unit which instruction to execute and bits that say where to get the arguments. Arguments might be memory addresses or immediate values.

Execute

The control unit executes the instruction.

  • Arithmetic and logical operations are executed using the ALU which may set flags.
  • Memory operations are executed by talking to RAM through the MAR and MDR.
  • Jump instructions (conditionals, loops, and gotos) are executed by manipulating the PC, possibly based on flag values.

Now let’s complicate/modernize the CPU a bit.

Add general purpose registers

These registers give the compiler places to store values on the CPU so we don’t have to hit RAM as often.

Get rid of the special accumulator

Generalize the ALU to be able to operate on any two general purpose registers.

Add a cache

Without the compiler doing anything, the CPU can keep data that is used a lot in fast memory directly on the CPU.